M32C8A Datasheet, PDF (92/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
9. Clock Generation Circuits
PLL Control Register 0 ^{(1, 2, 5)}
b7 b6 b5 b4 b3 b2 b1 b0
101
Symbol
PLC0
Address
0026h
After Reset
0001 X010b
Bit Symbol
Bit Name
PLC00
PLC01
Programmable counter
select bits⁽³⁾
PLC02
Function
RW
The VCO clock is the main clock multiplied by
the following variables.
RW
b2 b1 b0
0 1 1: Multiply-by-6
1 0 0: Multiply-by-8
RW
Do not set to values other than the above
RW
−
(b3)
Reserved bit
Read as undefined value
−
−
(b4)
Reserved bit
Set to 1
RW
−
(b5)
Reserved bit
Set to 0
RW
−
(b6)
Reserved bit
Set to 1
RW
PLC07 Operation enable bit⁽⁴⁾
0: PLL stops
RW
1: PLL runs
NOTES:
1. Set the PLC0 register after the PRC0 bit in the PRCR register is set to 1 (write enable).
2. If the PM21 bit in the PM2 register is set to 1 (disables a clock chang), a write to the PLC0 register has no effect.
3. Set bits PLC02 to PLC00 while the PLC07 bit is 0. Bits PLC02 to PLC00 can be written only once.
4. Enter wait mode or stop mode after the CM17 bit is set to 0 (main clock as CPU clock source) and then the PLC07 bit to 0.
5. Set registers PLC0 and PLC1 simultaneously in 16-bit units .
PLL Control Register 1^{(1, 2, 3, 4)}
b7 b6 b5 b4 b3 b2 b1 b0
000 0 10
Syambol
PLC1
Address
0027h
After Reset
000X 0000b
Bit Symbol
Bit Name
Function
RW
−
(b0)
Reserved bit
Set to 0
RW
−
(b1)
Reserved bit
Set to 1
RW
PLC12 PLL clock division select bit
0: Divide-by-2
1: Divide-by-3
RW
−
(b3)
Reserved bit
Set to 0
RW
−
(b4)
Reserved bit
Read as undefined value
−
−
(b7-b5)
Reserved bits
Set to 0
RW
NOTES:
1. Set the PLC1 register after the PRC0 bit in the PRCR register is set to 1 (write enable).
2. If the PM21 bit in the PM2 register is set to 1 (disables a clock change), a write to the the PLC1 register has no effect.
3. Set the PLC1 register while the PLC07 bit is 0 (PLL stopped).The PLC1 register can be written only once.
4. Set registers PLC0 and PLC1 simultaneously in 16-bit units.
Figure 9.6
PLC0 Register, PLC1 Register
Rev.1.00 Jul 15, 2007 Page 75 of 352
REJ09B0385-0100