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M32C8A Datasheet, PDF (254/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series
M32C/8A Group
17. Serial Interfaces
Table 17.14 Pin Settings in Special Mode 2
Bit Setting
Port
Function
PD6, PD7, PD9 PSC Register
PSL0, PSL1, PS0, PS1, PS3
Registers(2)
PSL3 Registers Registers(1)(2)
P6_0
SS0 input
PD6_0 = 0
−
−
PS0_0 = 0
P6_1
CLK0 output (master) −
−
PSL0_1 = 0
PS0_1 = 1
CLK0 input (slave) PD6_1 = 0
−
−
PS0_1 = 0
P6_2
RXD0 input (master) PD6_2 = 0
−
−
PS0_2 = 0
STXD0 output (slave) −
−
PSL0_2 = 1
PS0_2 = 1
P6_3
TXD0 output (master) −
−
PSL0_3 = 0
PS0_3 = 1
SRXD0 input (slave) PD6_3 = 0
−
−
PS0_3 = 0
P6_4
SS1 input
PD6_4 = 0
−
−
PS0_4 = 0
P6_5
CLK1 output (master) −
−
PSL0_5 = 0
PS0_5 = 1
CLK1 input (slave) PD6_5 = 0
−
−
PS0_5 = 0
P6_6
RXD1 input (master) PD6_6 = 0
−
−
PS0_6 = 0
STXD1 output (slave) −
−
PSL0_6 = 1
PS0_6 = 1
P6_7
TXD1 output (master) −
−
PSL0_7 = 0
PS0_7 = 1
P7_0(3)
SRXD1 input (slave) PD6_7 = 0
TXD2 output (master) −
−
PSC_0 = 0
−
PSL1_0 = 0
PS0_7 = 0
PS1_0 = 1
SRXD2 input (slave) PD7_0 = 0
−
−
PS1_0 = 0
P7_1(3)
RXD2 input (master) PD7_1 = 0
−
−
PS1_1 = 0
STXD2 output (slave) −
−
PSL1_1 = 1
PS1_1 = 1
P7_2
CLK2 output (master) −
PSC_2 = 0
PSL1_2 = 0
PS1_2 = 1
CLK2 input (slave) PD7_2 = 0
−
−
PS1_2 = 0
P7_3
SS2 input
PD7_3 = 0
−
−
PS1_3 = 0
P9_0
CLK3 output (master) −
−
PSL3_0 = 0
PS3_0 = 1
CLK3 input (slave) PD9_0 = 0
−
−
PS3_0 = 0
P9_1
RXD3 input (master) PD9_1 = 0
−
−
PS3_1 = 0
STXD3 output (slave) −
−
PSL3_1 = 1
PS3_1 = 1
P9_2
TXD3 output (master) −
−
PSL3_2 = 0
PS3_2 = 1
SRXD3 input (slave) PD9_2 = 0
−
−
PS3_2 = 0
P9_3
SS3 input
PD9_3 = 0
−
PSL3_3 = 0
PS3_3 = 0
P9_4
SS4 input
PD9_4 = 0
−
PSL3_4 = 0
PS3_4 = 0
P9_5
CLK4 output (master) −
−
−
PS3_5 = 1
CLK4 input (slave) PD9_5 = 0
−
PSL3_5 = 0
PS3_5 = 0
P9_6
TXD4 output (master) −
−
−
PS3_6 = 1
SRXD4 input (slave) PD9_6 = 0
−
PSL3_6 = 0
PS3_6 = 0
P9_7
RXD4 input (master) PD9_7 = 0
−
−
PS3_7 = 0
STXD4 output (slave) −
−
PSL3_7 = 1
PS3_7 = 1
NOTES:
1. Set registers PS0, PS1, and PS3 after setting other registers.
2. Set the PD9 or PS3 register immediately after the PRC2 bit in the PRCR register is set to 1 (write enable). Do
not generate an interrupt or a DMA or DMACII transfer between these two instructions.
3. P7_0 and P7_1 are N-channel open drain output ports.
Rev.1.00 Jul 15, 2007 Page 237 of 352
REJ09B0385-0100