M32C8A Datasheet, PDF (10/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

11.5.2 Relocatable Vector Table ................................................................................................................... 99
11.6 Interrupt Request Acknowledgement .................................................................................................... 102
11.6.1 I Flag and IPL ................................................................................................................................... 102
11.6.2 Interrupt Control Registers and RLVL Register ............................................................................... 102
11.6.3 Interrupt Sequence ............................................................................................................................ 106
11.6.4 Interrupt Response Time .................................................................................................................. 107
11.6.5 IPL Change when Interrupt Request is Acknowledged .................................................................... 108
11.6.6 Saving a Register .............................................................................................................................. 108
11.6.7 Returning from Interrupt Routine ..................................................................................................... 109
11.6.8 Interrupt Priority ............................................................................................................................... 109
11.6.9 Interrupt Priority Level Select Circuit .............................................................................................. 109
11.7 INT Interrupt ......................................................................................................................................... 111
11.8 NMI Interrupt ........................................................................................................................................ 114
11.9 Key Input Interrupt ................................................................................................................................ 114
11.10 Address Match Interrupt ....................................................................................................................... 115
12. Watchdog Timer .......................................................................................................................... 116
13. DMAC ......................................................................................................................................... 120
13.1 Transfer Cycles ..................................................................................................................................... 130
13.1.1 Effect of Source and Destination Addresses .................................................................................... 130
13.1.2 Effect of the DS Register .................................................................................................................. 130
13.1.3 Effect of Software Wait State ........................................................................................................... 130
13.1.4 Effect of the RDY Signal .................................................................................................................. 130
13.2 DMA Transfer Time ............................................................................................................................. 131
13.3 Channel Priority and DMA Transfer Timing ........................................................................................ 131
14. DMACII ....................................................................................................................................... 133
14.1 DMACII Settings .................................................................................................................................. 133
14.1.1 RLVL Register ................................................................................................................................. 133
14.1.2 DMACII Index ................................................................................................................................. 135
14.1.3 Interrupt Control Register for the Peripheral Function .................................................................... 137
14.1.4 Relocatable Vector Table for the Peripheral Function ..................................................................... 137
14.2 DMACII Performance ........................................................................................................................... 137
14.3 Transfer Data ......................................................................................................................................... 137
14.3.1 Memory-to-memory Transfer ........................................................................................................... 137
14.3.2 Immediate Data Transfer .................................................................................................................. 138
14.3.3 Calculation Transfer ......................................................................................................................... 138
14.4 Transfer Modes ..................................................................................................................................... 138
14.4.1 Single Transfer ................................................................................................................................. 138
14.4.2 Burst Transfer ................................................................................................................................... 138
14.4.3 Multiple Transfer .............................................................................................................................. 138
14.5 Chain Transfer ....................................................................................................................................... 139
14.6 End-of-Transfer Interrupt ...................................................................................................................... 139
14.7 Execution Time ..................................................................................................................................... 140
15. Timers ......................................................................................................................................... 141
15.1 Timer A ................................................................................................................................................. 143
15.1.1 Timer Mode ...................................................................................................................................... 155
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