M32C8A Datasheet, PDF (70/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
8. Bus
Example 1:
After accessing the external space, both address bus
and chip-select output change
When the MCU accesses the external space j
specified by another chip-select output in the next
cycle after having accessed the external space i, both
address bus and chip-select output change.
Access
external
space i
Access another
external space j
Example 2:
After accessing an external space, the chip-select
output changes but the address bus does not.
When the MCU accesses SFR or internal RAM area
in the next cycle after having accessed an external
space, the chip-select signal changes but the
address bus does not.
Access
external
space
Access SFR,
internal RAM
Data bus
Data
Data
Data bus
Data
Address bus
Address
Address bus
Address
Chip-select: CSk
Chip-select: CSp
Chip-select: CSk
Example 3:
After accessing the external space, the address bus
changes but the chip-select output does not.
When the MCU accesses the space i specified by the
same chip-select output in the next cycle after having
accessed the external space i, the address bus
changes but the chip-select output does not.
Access
external
space i
Access the same
external space i
Data bus
Data
Data
Address bus
Address
Chip-select: CSk
Example 4:
After accessing an external space, neither address
bus nor chip-select signal changes.
When the MCU does not access any spaces in the
next cycle after having accessed an external space
(no instruction prefetch is performed), neither
address bus nor chip-select signal changes.
Access
external
space
No accesss to
external space
Data bus
Data
Address bus
Address
Chip-select: CSk
i = 0 to 3
j = 0 to 3, excluding i
k = 0 to 3
p = 0 to 3, excluding k
NOTE:
1. The above examples show the address bus and chip-select output in two consecutive bus cycles.
Depending on the combination, the chip-select signal can be more than two bus cycles.
CS1 outputs an "L" signal while accessing the external space 0.
CS2 outputs an "L" signal while accessing the external space 1.
CS3 outputs an "L" signal while accessing the external space 2.
CS0 outputs an "L" signal while accessing the external space 3.
Figure 8.2 Address Bus and Chip-Select Outputs (Separate Bus)
Rev.1.00 Jul 15, 2007 Page 53 of 352
REJ09B0385-0100