M32C8A Datasheet, PDF (149/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
13. DMAC
Example when DMA transfer requests for DMA0 and DMA1 are generated simultaneously
and DMA transfers (SFR to RAM) are performed in minimum time.
BCLK
DMA0
DMA1
CPU
INT0
DRQ bit in
DMA0
INT1
DRQ bit in
DMA1
Figure 13.9 DMA Transfers Triggered by INT Interrupt Requests
Bus
privilege
acquired
Rev.1.00 Jul 15, 2007 Page 132 of 352
REJ09B0385-0100