M32C8A Datasheet, PDF (74/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
8. Bus
• Bus cycle 1 φ + 1 φ
1 bus cycle = 2 φ
BCLK
Address
CSi
(1)
Read data
RD
Write data
WR, WRL, WRH
• Bus cycle 1 φ + 2 φ
1 bus cycle = 3 φ
BCLK
Address
CSi
(1)
Read data
RD
Write data
WR, WRL, WRH
• Bus cycle 1 φ + 3 φ
1 bus cycle = 4 φ
BCLK
Address
CSi
(1)
Read data
RD
Write data
WR, WRL, WRH
• Bus cycle 1 φ + 4 φ
BCLK
1 bus cycle = 5 φ
Address
CSi
(1)
Read data
RD
Write data
WR, WRL, WRH
• Bus cycle 1 φ + 5 φ
BCLK
1 bus cycle = 6 φ
• Bus cycle 1 φ + 6 φ
BCLK
1 bus cycle = 7 φ
Address
Address
CSi
(1)
CSi
(1)
Read data
Read data
RD
RD
Write data
Write data
WR, WRL, WRH
WR, WRL, WRH
i = 0 to 3
NOTE:
1. When the MCU accesses the same CS area consecutively, the CSi pin keeps outputting "L".
Figure 8.4 Bus Cycles when Separate Bus is Selected (1)
Rev.1.00 Jul 15, 2007 Page 57 of 352
REJ09B0385-0100