M32C8A Datasheet, PDF(153/372 Page) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

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M32C8A Datasheet, PDF (153/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

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M32C/8A Group

14. DMACII

Table 14.2 DMACII Index Configuration in Transfer Mode

Transfer data

Chain transfer

End-of-

Transfer

Interrupt

Not used

Memory-to-Memory Transfer/

Immediate Data Transfer

Used

Not used

Not used Not used

Used

Used

Used

Not used

Not used

Calculation Transfer

Used

Not used

Not used

Used

DMAC II index

MOD

MOD

MOD

MOD

MOD

MOD

MOD

COUNT

COUNT

COUNT

COUNT

COUNT

COUNT

COUNT

SADR

SADR

SADR

SADR

SADR

SADR

SADR

DADR

8 bytes

DADR

CADR0

DADR

IADR0

DADR

CADR0

OADR

DADR

OADR

DADR

OADR

DADR

CADR1

IADR1

CADR1

10 bytes

CADR0

IADR0

12 bytes

12 bytes

IADR0

IADR1

CADR1

14 bytes

IADR1

14 bytes

16 bytes

Used

Used

Multiple

Transfer

Cannot used

Cannot used

MOD

COUNT

SADR

OADR

DADR

CADR0

CADR1

IADR0

IADR1

18 bytes

MOD

COUNT

SADR1

DADR1

SADRi

DADRi

i = 1 to 7

max. 32 bytes

(when i = 7)

Transfer Mode (MOD)(1)

b15

b8 b7

b0

Bit Symbol

Bit Name

SIZE

Transfer unit select bit

Function

(MULT = 0)

0: 8 bits

1: 16 bits

Function

(MULT = 1)

RW

RW

IMM

Transfer data select bit

0: Immediate data

1: Memory

Set to 1

RW

UPDS

Transfer source direction 0: Fixed address

select bit

1: Incremented address

RW

UPDD

Transfer destination

direction select bit

0: Fixed address

1: Incremented address

RW

OPER/

CNT0(2)

Calculation transfer

function select bit

0: Not used

1: Used

BRST/

CNT1(2)

Burst transfer select bit

0: Single transfer

1: Burst transfer

INTE/

CNT2(2)

End-of-transfer interrupt 0: Interrupt not used

select bit

1: Interrupt used

b6 b5 b4

0 0 0: Do not set to this

RW

value

0 0 1: Once

0 1 0: Twice

RW

:

:

1 1 0: 6 times

1 1 1: 7 times

RW

CHAIN

Chain transfer

select bit

0: Chain transfer not

used

1: Chain transfer used

Set to 0

RW

â

(b14-b8)

Unimplemented.

Write 0. Read as undefined value.

â

MULT

Multiple transfer

select bit

0: Multiple transfer not

used

1: Multiple transfer used

RW

NOTES:

1. MOD must be located in the RAM.

2. When the MULT bit is set to 0, bits 6 to 4 function as bits OPER, BRST, and INTE. When the MULT bit is set to 1, bits 6 to 4

function as bits CNT2 to CNT0.

Figure 14.3 MOD

Rev.1.00 Jul 15, 2007 Page 136 of 352

REJ09B0385-0100

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