M32C8A Datasheet, PDF (228/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
17. Serial Interfaces
RE bit in the
1
UiC1 register
0
TE bit in the
1
UiC1 register
0
TI bit in the UiC1
1
register
0
“H”
RTSi output
“L”
“H”
CLKi input⁽¹⁾
“L”
“H”
RXDi input
“L”
RI bit in the
1
UiC1 register
0
IR bit in the SiRIC ¹
register
0
OER bit in the
1
UiRB register
0
Write dummy data to UiTB register
Transfer data from UiTB register
to UARTi transmit shift register
1
fEXT
Becomes "L" by reading UiRB register
D0 D1 D2 D3 D4 D5 D6 D7
Transfer data from UARTi
receive shift register to UiRB
register
D0 D1 D2 D3 D4 D5 D6 D7
A read from UiRB register
D0 D1 D2 D3 D4 D5 D6 D7
Set to 0 by an interrupt request acknowledgement or by program
i = 0 to 4
fEXT = external clock frequency
The above applies under the following conditions:
- UiMR register: CKDIR bit = 1 (external clock)
- UiC0 reigster: CRD bit = 1 (CTS function disabled)
CKPOL bit = 0 (receive data input at the rising edge of the serial clock)
NOTE:
1. Satisfy the following conditions, while the CLKi pin input is "H" before the data receive operation.
- UiC1 register: TE bit = 1 (transmit operation enabled)
RE bit = 1 (receive operation enabled)
- Write dummy data to the UiTB register
Figure 17.13 Receive Operations when External Clock is Selected
Rev.1.00 Jul 15, 2007 Page 211 of 352
REJ09B0385-0100