M32C8A Datasheet, PDF (249/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
17. Serial Interfaces
17.1.3.1 Detecting Start Condition and Stop Condition
The MCU detects the start condition and stop condition. The start condition detection interrupt request is
generated when the SDAi (i = 0 to 4) pin level changes from high (“H”) to low (“L”) while the SCLi pin level is
held “H”. The stop condition detection interrupt request is generated when the SDAi pin level changes from “L”
to “H” while the SCLi pin level is held “H”.
The start condition detection interrupt shares the Interrupt Control Register and interrupt vector with the stop
condition detection interrupt. The BBS bit in the UiSMR register determines which interrupt is requested.
6 cycles < setup time⁽¹⁾
6 cycles < hold time⁽¹⁾
SCLi
Setup time
SDAi
(start condition)
SDAi
(stop condition)
i=0 to 4
NOTE:
1. These are cycles of the main clock oscillation frequency f(XIN).
Hold time
Figure 17.25 Start Condition or Stop Condition Detection
17.1.3.2 Start Condition or Stop Condition Output
The start condition is generated when the STAREQ bit in the UiSMR4 register (i = 0 to 4) is set to 1 (start).
The restart condition is generated when the RSTAREQ bit in the UiSMR4 register is set to 1 (start).
The stop condition is generated when the STPREQ bit in the UiSMR4 is set to 1 (start).
The following is the procedure to output the start condition, restart condition, or stop condition.
(1) Set the STAREQ bit, RSTAREQ bit, or STPREQ bit to 1 (start).
(2) Set the STSPSEL bit in the UiSMR4 register to 1 (start/stop condition generation circuit selected).
Table 17.12 and Figure 17.26 show functions of the STSPSEL bit.
Table 17.12 STSPSEL Bit Function
Function
STSPSEL = 0
STSPSEL = 1
Output from pins SCLi and
SDAi
Output the serial clock and data.
Output of the start condition or stop
Output of the start condition or stop
condition is controlled by the status of bits
condition is controlled by software utilizing STAREQ, RSTAREQ, and STPREQ.
port functions. (The start condition and
stop condition are not automatically
generated by hardware)
Timing to generate start
condition and stop condition
interrupt requests
When start condition and stop condition When start condition and stop condition
are detected
generation are completed
Rev.1.00 Jul 15, 2007 Page 232 of 352
REJ09B0385-0100