M32C8A Datasheet, PDF (125/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
11. Interrupts
11.6.5 IPL Change when Interrupt Request is Acknowledged
When a peripheral function interrupt request is acknowledged, the priority level for the acknowledged interrupt
becomes the IPL level.
Software interrupts and special interrupts have no interrupt priority level. If an interrupt that has no interrupt
priority level occurs, the value shown in Table 11.6 becomes the IPL level.
Table 11.6 Interrupts without Interrupt Priority Levels and IPL
Interrupt Source
IPL level
Watchdog timer, NMI, oscillation stop detection, Vdet4 detection
7
Software, address match
Not changed
11.6.6 Saving a Register
In the interrupt sequence, values of the FLG register and PC are saved to the stack.
Figure 11.8 shows the stack states before and after an interrupt request is acknowledged.
The other necessary registers are saved by program at the beginning of the interrupt routine. The PUSHM
instruction can save multiple registers⁽¹⁾ in the register bank currently used.
Refer to 11.4 High-Speed Interrupt for the high-speed interrupt.
NOTE:
1. Selectable from registers R0, R1, R2, R3, A0, A1, SB, and FB.
Address
MSB
Stack
LSB
m-6
m-5
m-4
m-3
m-2
m-1
m
m+1
Previous stack
contents
Previous stack
contents
[SP]
SP value before
an interrupt is
generated
Address
MSB
Stack
LSB
m-6
m-5
m-4
m-3
m-2
m-1
m
m+1
PCL
PCM
PCH
00h
FLGL
FLGH
Previous stack
contents
Previous stack
contents
[SP]
New SP value
PCL: 8 low-order bits of PC
PCM: 8 middle-order bits of PC
PCH: 8 high-order bits of PC
FLGL: 8 low-order bits of FLG
FLGH: 8 high-order bits of FLG
Stack state before an interrupt
request is acknowledged
Stack state before an interrupt
request is acknowledged
Figure 11.8 Stack States Before and After Acknowledgement of Interrupt Request
Rev.1.00 Jul 15, 2007 Page 108 of 352
REJ09B0385-0100