M32C8A Datasheet, PDF (107/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
9. Clock Generation Circuits
Table 9.7 Interrupts to Exit Wait Mode and Usage Conditions
Interrupt
When CM02 = 0
When CM02 = 1
NMI interrupt
Available
Available
Vdet4 detection interrupt
Available
Available
Serial interface interrupt
Available when the source clock is the
internal clock or clock input to the CLKi
pin.
Available when the source clock is the
clock input to the CLKi pin or f2n (when
fXIND or on-chip oscillator clock is
selected).
Key input interrupt
Available
Available
A/D conversion interrupt
Available in one-shot mode or single-
sweep mode
Not available
Timer A interrupt
Timer B interrupt
Available in all modes
Available in event counter mode or when
the count source is fC32 or f2n (when
fXIND or on-chip oscillator clock is
selected)
INT interrupt
Available
Available
9.5.3 Stop Mode
In stop mode, all clocks are stopped. Since the CPU clock and peripheral function clocks are stopped, the CPU
and the peripheral functions which are operated by these clocks stop their operation. The least power is required
to operate the MCU in stop mode. Enter stop mode from main clock mode.
9.5.3.1 Entering Stop Mode
Stop mode is entered when setting the CM10 bit in the CM1 register to 1 (all clocks stop) while the NMI pin is
held “H”. Also, bits MCD4 to MCD0 in the MCD register become 01000b (divide-by-8 mode) by setting the
CM10 bit to 1.
Figure 9.15 shows a procedure to enter stop mode.
When entering stop mode, the instructions following CM10 = 1 instruction are stored into the instruction queue,
and the program stops. When stop mode is exited, the instruction lined in the queue is executed before the exit
interrupt routine is handled.
Insert the jmp.b instruction as follows after the instruction to set the CM10 bit to 1.
fset I
bset 0, cm1
jmp.b LABEL_001
LABEL_001:
nop
nop
nop
nop
mov.b #0, prcr
.
.
.
; I flag is set to 1
; all clocks stopped (stop mode)
; jmp.b instruction executed (no instruction between jmp.b and LABEL.)
; nop(1)
; nop(2)
; nop(3)
; nop(4)
; protection set
Rev.1.00 Jul 15, 2007 Page 90 of 352
REJ09B0385-0100