M32C8A Datasheet, PDF (78/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
• Bus cycle 3 φ + 4 φ
BCLK
CSi
Read data
RD
Write data
WR (WRL)
ALE
1 bus cycle = 7 φ
LA
(1)
RD
LA
WD
• Bus cycle 3 φ + 5 φ
BCLK
CSi
Read data
RD
Write data
WR (WRL)
ALE
1 bus cycle = 8 φ
LA
(1)
RD
LA
WD
• Bus cycle 3 φ + 6 φ
BCLK
CSi
Read data
LA
RD
Write data
LA
WR (WRL)
ALE
1 bus cycle = 9 φ
WD
(1)
RD
LA: Latch address RD: Read data WD: Write data
i = 0 to 3
NOTE:
1. When the MCU accesses the same CS area consecutively, the CSi pin keeps outputting "L".
Figure 8.8 Bus Cycles when Multiplexed Bus is Selected (2)
Rev.1.00 Jul 15, 2007 Page 61 of 352
REJ09B0385-0100
8. Bus