M32C8A Datasheet, PDF (38/372 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 Series

M32C/8A Group
3. Memory
3. Memory
Figure 3.1 is a memory map of the M32C/8A Group.
The M32C/8A Group has 16-Mbyte address space from addresses 000000h to FFFFFFh.
The fixed interrupt vectors are allocated addresses FFFFDCh to FFFFFFh. They store the starting address of each
interrupt routine. Refer to 11. Interrupts for details.
The internal RAM is allocated higher addresses, beginning with address 000400h. For example, a 12-Kbyte internal
RAM area is allocated addresses 000400h to 0033FFh. The internal RAM is used not only for storing data but for the
stacks when subroutines are called or when interrupt requests are acknowledged.
SFRs are allocated address 000000h to 0003FFh. The peripheral function control registers such as for I/O ports, A/D
converters, serial interfaces, timers are allocated here. All blank spaces within SFRs are reserved and cannot be
accessed by users.
The special page vectors are allocated addresses FFFE00h to FFFFDBh. They are used for the JMPS instruction and
JSRS instruction. Refer to the Renesas publication M32C/80 Series Software Manual for details.
000000h
000400h
XXXXXXh
010000h
SFR
Internal RAM
Reserved
External Space
FFFFFFh
FFFE00h
FFFFDCh
Special page
vector table
Undefined instruction
Overflow
BRK instruction
Address match
Watchdog timer⁽¹⁾
FFFFFFh
NMI
Reset
Internal RAM
Capacity XXXXXXh
12 Kbytes 0033FFh
24 Kbytes 0063FFh
NOTE:
1. The watchdog timer interrupt, oscillation stop detection interrupt , and Vdet4 detection interrupt use the same vector.
Figure 3.1 Memory Map
Rev.1.00 Jul 15, 2007 Page 21 of 352
REJ09B0385-0100