HD64F7051SFJ20V Datasheet, PDF (837/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Appendix B Pin States
B.2 Pin States of Bus Related Signals
Table B.2 shows the SH7050 pin states of BUS related signals.
Table B.2 Pin States of BUS Related Signals
Pins
On-Chip
ROM
CS0 to CS3
RD
R
W
WRH
R
W
WRL
R
W
A21 to A0
D15 to D8
D7 to D0
H
H
—
H
—
H
—
Address
Hi-Z
Hi-Z
On-Chip
RAM
H
H
H
H
H
H
H
Address
Hi-Z
Hi-Z
On-Chip Peripheral Module
8-Bit
Space
Upper
Byte
16-Bit Space
Lower
Word/
Byte Long Word
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Address Address Address Address
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Pins
8-Bit Space
CS0 to CS3
Valid
RD
R
L
W
H
WRH
R
H
W
H
WRL
R
H
W
L
A21 to A0
Address
D15 to D8
Hi-Z
D7 to D0
Data
Note: R is reading operation.
W is writing operation.
External Common Space
Upper Byte
Lower Byte
Valid
Valid
L
L
H
H
H
H
L
H
H
H
H
L
Address
Address
Data
Hi-Z
Hi-Z
Data
Word/Long Word
Valid
L
H
H
L
H
L
Address
Data
Data
Rev. 5.00 Jan 06, 2006 page 815 of 818
REJ09B0273-0500