HD64F7051SFJ20V Datasheet, PDF (722/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Appendix A On-Chip Supporting Module Registers
Timer Mode Register (TMDR)
H'FFFF8200
(Channels 3 to 5)
Bit: 7
6
5
4
3
Bit name: —
—
—
—
—
Initial value: 0
0
0
0
0
R/W: R
R
R
R
R
8
ATU
2
1
0
T5PWM T4PWM T3PWM
0
0
0
R/W R/W R/W
Bit
Bit Name
Value Description
2
PWM mode 5 (T5PWM) 0
Channel 5 is in input capture/output compare mode
(Initial value)
1
Channel 5 is in PWM mode
1
PWM mode 4 (T4PWM) 0
Channel 4 is in input capture/output compare mode
(Initial value)
1
Channel 4 is in PWM mode
0
PWM mode 3 (T3PWM) 0
Channel 3 is in input capture/output compare mode
(Initial value)
1
Channel 3 is in PWM mode
Rev. 5.00 Jan 06, 2006 page 700 of 818
REJ09B0273-0500