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HD64F7051SFJ20V Datasheet, PDF (688/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC
Section 22 Electrical Characteristics
22.3.4 Direct Memory Access Controller Timing
Table 22.7 Direct Memory Access Controller Timing
Conditions: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, AVREF = 4.5 V to AVCC, VSS = AVSS = 0 V,
Ta = –40 to +85°C
Item
Symbol Min
DREQ0 and DREQ1 setup time t
27
DRQS
DREQ0 and DREQ1 hold time
tDRQH
30
DREQ0 and DREQ1 pulse width tDRQW
1.5
DRAK output delay time
tDRAKD
—
Max
—
—
—
25
Unit
ns
ns
tcyc
ns
Figure
22.11
22.12
22.13
CK
DREQ0,
DREQ1
level
DREQ0,
DREQ1
edge
DREQ0,
DREQ1
level release
tDRQS
tDRQS
tDRQH
tDRQS
Figure 22.11 DREQ0 and DREQ1 Input Timing (1)
Rev. 5.00 Jan 06, 2006 page 666 of 818
REJ09B0273-0500