HD64F7051SFJ20V Datasheet, PDF (303/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 10 Advanced Timer Unit (ATU)
10.2.18 Buffer Registers (BFR)
The buffer registers (BFR) are 16-bit registers. The ATU has four buffer registers, one each for
channels 6 to 9.
Channel
6
7
8
9
Abbreviation
BFR6
BFR7
BFR8
BFR9
Function
Buffer registers
Buffer Registers (BFR6 to BFR9)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
The BFR registers are 16-bit readable/writable registers that store the value to be transferred to the
duty register (DTR) in the event of a cycle register (CYLR) compare-match.
The BFR registers are connected to the CPU via an internal 16-bit bus, and can only be accessed
by a word read or write.
The BFR registers are initialized to H'FFFF by a power-on reset, and in hardware standby mode
and software standby mode.
Rev. 5.00 Jan 06, 2006 page 281 of 818
REJ09B0273-0500