HD64F7051SFJ20V Datasheet, PDF (766/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Appendix A On-Chip Supporting Module Registers
IRQ Status Register (ISR)
H'FFFF835A
Bit: 15
14
13
12
11
Bit name: —
—
—
—
—
Initial value: 0
0
0
0
0
R/W: R
R
R
R
R
8/16/32
10
9
—
—
0
0
R
R
INTC
8
—
0
R
Bit:
Bit name:
Initial value:
R/W:
7
IRQ0F
0
R/W
6
IRQ1F
0
R/W
5
IRQ2F
0
R/W
4
IRQ3F
0
R/W
3
IRQ4F
0
R/W
2
IRQ5F
0
R/W
1
IRQ6F
0
R/W
0
IRQ7F
0
R/W
Bit
Bit Name
Detection
Value Setting Description
7–0
IRQ0 to IRQ7 flags 0
(IRQ0F to IRQ7F)
Level
detection
There is no IRQn interrupt request
[Clearing condition]
IRQn input is high
Edge
IRQn interrupt request has not been
detection detected
(Initial value)
[Clearing conditions]
1. Read IRQnF when IRQnF =1, then
write 0 in IRQnF
2. IRQn interrupt exception handling is
carried out
1
Level
There is an IRQn interrupt request
detection _{[Setting condition]}
IRQn input is low
Edge
detection
IRQn interrupt request has been detected
[Setting condition]
Falling edge in IRQn input
Rev. 5.00 Jan 06, 2006 page 744 of 818
REJ09B0273-0500