HD64F7051SFJ20V Datasheet, PDF (551/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 17 I/O Ports (I/O)
17.7 Port F
Port F is an input/output port with the 12 pins shown in figure 17.6.
Port F
Expanded mode
PF11 (input/output)/BREQ (input)/PULS7 (output)
PF10 (input/output)/BACK (output)/PULS6 (output)
PF9 (input/output)/CS3 (output)/IRQ7 (input)/
PULS5 (output)
Single-chip mode
PF11 (input/output)/PULS7 (output)
PF10 (input/output)/PULS6 (output)
PF9 (input/output)/IRQ7 (input)/
PULS5 (output)
PF8 (input/output)/SCK2 (output)/PULS4 (output)
PF7 (input/output)/DREQ0 (input)/PULS3 (output)
PF6 (input/output)/DACK0 (output)/PULS2 (output) PF6 (input/output)/PULS2 (output)
PF5 (input/output)/DREQ1 (input)/PULS1 (output)
PF4 (input/output)/DACK1 (output)/PULS0 (output) PF4 (input/output)/PULS0 (output)
PF3 (input/output)/IRQ3 (input)
PF2 (input/output)/IRQ2 (input)
PF1 (input/output)/IRQ1 (input)
PF0 (input/output)/IRQ0 (input)
Figure 17.6 Port F
17.7.1 Register Configuration
The port F register is shown in table 17.11.
Table 17.11 Port F Register
Name
Abbreviation R/W Initial Value Address
Port F data register
PFDR
R/W H'F000
H'FFFF83A6
Note: A register access is performed in two cycles regardless of the access size.
Access Size
8, 16
Rev. 5.00 Jan 06, 2006 page 529 of 818
REJ09B0273-0500