HD64F7051SFJ20V Datasheet, PDF (309/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 10 Advanced Timer Unit (ATU)
External output value selection and counter clear function (channels 3 to 5 only) specification can
be performed with the timer I/O control register (TIOR). 1 output, 0 output, or toggle output can
be selected as the external output value. When the counter clear function is specified, the relevant
TCNT is cleared to H'0000 by a compare-match between the corresponding general register and
TCNT. If the appropriate interrupt enable register (TIER) setting is made, an interrupt request will
be sent to the CPU when an output compare-match occurs.
An example of free-running counter and output compare-match operation is shown in figure
10.13.
In the example in figure 10.13, ATU channel 1 is activated, and external output is performed with
1 output specified in the event of GR1A output compare-match, 0 output in the event of GR1B
output compare-match, and toggle output in the event of GR1C output compare-match.
H'FFFF
GR1A
GR1B
GR1C
H'0000
TIOA1
(1 output)
TIOB1
(0 output)
TIOC1
(toggle output)
Counter value
TCNT1
No change
Time
No change
No change
Figure 10.13 Example of Output Compare-Match Operation
Rev. 5.00 Jan 06, 2006 page 287 of 818
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