HD64F7051SFJ20V Datasheet, PDF (182/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 9 Direct Memory Access Controller (DMAC)
CK
A21–A0
CSn
D15–D0
DACK
WRH
WRL
Address output to external memory space
Data that is output from the external
device with DACK
DACK signal to external devices with
DACK (active low)
WR signal to external memory space
a. External device with DACK to external memory space
CK
A21–A0
CSn
Address output to external memory space
D15–D0
RD
Data that is output from external memory space
RD signal to external memory space
DACK
DACK signal to external device with DACK
(active low)
b. External memory space to external device with DACK
Figure 9.6 Example of DMA Transfer Timing in the Single Address Mode
9.3.6 Dual Address Mode
Dual address mode is used for access of both the transfer source and destination by address.
Transfer source and destination can be accessed either internally or externally. Dual address mode
is subdivided into two other modes: direct address transfer mode and indirect address transfer
mode.
Rev. 5.00 Jan 06, 2006 page 160 of 818
REJ09B0273-0500