HD64F7051SFJ20V Datasheet, PDF (75/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 4 Clock Pulse Generator (CPG)
Section 4 Clock Pulse Generator (CPG)
4.1 Overview
The clock pulse generator (CPG) supplies clock pulses inside the SH7050 series chip and to
external devices. The SH7050 series CPG consists of an oscillator circuit and a PLL multiplier
circuit. There are two methods of generating a clock with the CPG: by connecting a crystal
resonator, or by inputting an external clock. The oscillator circuit oscillates at the same frequency
as the input clock. A chip operating frequency of 1, 2, or 4 times the oscillator frequency can be
selected by means of the PLL multiplier circuit.
The CPG is halted in software standby mode and hardware standby mode.
Rev. 5.00 Jan 06, 2006 page 53 of 818
REJ09B0273-0500