HD64F7051SFJ20V Datasheet, PDF (455/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

AV_CC
AV_ref
AV_SS
A/D0
10-bit D/A
Section 14 A/D Converter
Module data bus
ADDR0–11
Internal
data bus
ATU trigger
ADTRG
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
A/D1
Sample-and-
hold circuit
+
–
Comparator
A/D conversion
control circuit
Module data bus
10-bit D/A
ADDR
12–15
ADI0
interrupt
signal
Internal
data bus
AN12
AN13
AN14
AN15
Sample-and-
hold circuit
+
–
Comparator
A/D conversion
control circuit
Legend:
ADCR0, ADCR1: A/D control registers 0 and 1
ADCSR0, ADCSR1: A/D control/status registers 0 and 1
ADDR0 to ADDR15: A/D data registers 0 to 15
ADTRGR:
A/D trigger register
Figure 14.1 A/D Converter Block Diagram
ADEND
ADI1
interrupt
signal
Rev. 5.00 Jan 06, 2006 page 433 of 818
REJ09B0273-0500