HD64F7051SFJ20V Datasheet, PDF (241/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 10 Advanced Timer Unit (ATU)
Bit 2—PWM Mode 5 (T5PWM): Selects whether channel 5 operates in input capture/output
compare mode or PWM mode.
Bit 2:
T5PWM
0
1
Description
Channel 5 operates in input capture/output compare mode
Channel 5 operates in PWM mode
(Initial value)
When bit T5PWM is set to 1 to select PWM mode, pin TIOA5 becomes a PWM output pin,
general register 5B (GR5B) functions as a cycle register, and general register 5A (GR5A) as a
duty register.
Bit 1—PWM Mode 4 (T4PWM): Selects whether channel 4 operates in input capture/output
compare mode or PWM mode.
Bit 1:
T4PWM
0
1
Description
Channel 4 operates in input capture/output compare mode
Channel 4 operates in PWM mode
(Initial value)
When bit T4PWM is set to 1 to select PWM mode, pins TIOA4 to TIOC4 become PWM output
pins, general register 4D (GR4D) functions as a cycle register, and general registers 4A to 4C
(GR4A to GR4C) as duty registers.
Bit 0—PWM Mode 3 (T3PWM): Selects whether channel 3 operates in input capture/output
compare mode or PWM mode.
Bit 0:
T3PWM
0
1
Description
Channel 3 operates in input capture/output compare mode
Channel 3 operates in PWM mode
(Initial value)
When bit T3PWM is set to 1 to select PWM mode, pins TIOA3 to TIOC3 become PWM output
pins, general register 3D (GR3D) functions as a cycle register, and general registers 3A to 3C
(GR3A to GR3C) as duty registers.
Rev. 5.00 Jan 06, 2006 page 219 of 818
REJ09B0273-0500