HD64F7051SFJ20V Datasheet, PDF (78/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 4 Clock Pulse Generator (CPG)
The MD3 and MD2 pins should not be changed while the chip is operating, as normal operation
will not be possible in this case.
4.3 Clock Source
Clock pulses can be supplied from a connected crystal resonator or an external clock.
4.3.1 Connecting a Crystal Oscillator
Circuit Configuration: Figure 4.2 shows the example of connecting a crystal resonator. Use the
damping resistance (Rd) shown in table 4.3. An AT-cut parallel-resonance type crystal resonator
should be used. Load capacitors (CL1, CL2) must be connected as shown in the figure.
The clock pulses generated by the crystal resonator and internal oscillator are sent to the PLL
multiplier circuit, where a multiplied frequency is selected and supplied inside the SH7050 chip
and to external devices.
The crystal manufacturer should be consulted concerning the compatibility between the crystal
and the chip.
C_L2
EXTAL
C_L1
XTAL
R_d
C_L1 = C_L2 = 18Ð22 pF (recommended value)
Figure 4.2 Connection of the Crystal Oscillator (Example)
Table 4.3 Damping Resistance Values (Recommended Values)
Parameter
Rd (Ω)
Frequency (MHz)
4
8
10
500
200
0
Rev. 5.00 Jan 06, 2006 page 56 of 818
REJ09B0273-0500