HD64F7051SFJ20V Datasheet, PDF (633/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 19 ROM (256 kB Version)
Next, the watchdog timer is set to prevent overprogramming in the event of program runaway, etc.
Set 6.6 ms as the WDT overflow period. After this, preparation for program mode (program setup)
is carried out by setting the PSUn bit in FLMCRn, and after the elapse of 50 µs or more, the
operating mode is switched to program mode by setting the Pn bit in FLMCRn. The time during
which the Pn bit is set is the flash memory programming time. Use a fixed 500 µs pulse for the
write time.
19.7.2 Program-Verify Mode (n = 1 for Addresses H'0000 to H'1FFFF, n = 2 for
Addresses H'20000 to H'3FFFF)
In program-verify mode, the data written in program mode is read to check whether it has been
correctly written in the flash memory.
After the elapse of a given programming time, the programming mode is exited (the Pn bit in
FLMCRn is cleared, then the PSUn bit is cleared at least 10 µs later). The watchdog timer is
cleared after the elapse of 10 µs or more, and the operating mode is switched to program-verify
mode by setting the PVn bit in FLMCRn. Before reading in program-verify mode, a dummy write
of H'FF data should be made to the addresses to be read. The dummy write should be executed
after the elapse of 4 µs or more. When the flash memory is read in this state (verify data is read in
32-bit units), the data at the latched address is read. Wait at least 2 µs after the dummy write
before performing this read operation. Next, the written data is compared with the verify data, and
reprogram data is computed (see figure 19.7) and transferred to the reprogram data area. After 32
bytes of data have been verified, exit program-verify mode, wait for at least 4 µs, then clear the
SWE bit in FLMCR1. If reprogramming is necessary, set program mode again, and repeat the
program/program-verify sequence as before. However, ensure that the program/program-verify
sequence is not repeated more than 400 times on the same bits.
Rev. 5.00 Jan 06, 2006 page 611 of 818
REJ09B0273-0500