HD64F7051SFJ20V Datasheet, PDF (389/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 12 Watchdog Timer (WDT)
12.4.4 System Reset With WDTOVF
If a WDTOVF signal is input to the RES pin, the LSI cannot initialize correctly.
Avoid logical input of the WDTOVF output signal to the RES input pin. To reset the entire system
with the WDTOVF signal, use the circuit shown in figure 12.9.
Reset input
SH7050 series
RES
Reset signal to
entire system
WDTOVF
Figure 12.9 Example of a System Reset Circuit with a WDTOVF Signal
12.4.5 Internal Reset With the Watchdog Timer
If the RSTE bit is cleared to 0 in the watchdog timer mode, the LSI will not reset internally when a
TCNT overflow occurs, but the TCNT and TCSR in the WDT will reset.
Rev. 5.00 Jan 06, 2006 page 367 of 818
REJ09B0273-0500