HD64F7051SFJ20V Datasheet, PDF (715/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Serial Mode Register (SMR)
Bit: 7
Bit name: C/A
Initial value: 0
R/W: R/W
6
CHR
0
R/W
Appendix A On-Chip Supporting Module Registers
H'FFFF81A0 (Channel 0) 8/16
SCI
H'FFFF81B0 (Channel 1)
H'FFFF81C0 (Channel 2)
5
4
3
2
1
0
PE
O/E STOP MP CKS1 CKS0
0
0
0
0
0
0
R/W R/W R/W R/W R/W R/W
Bit
Bit Name
Value Description
7
Communication mode (C/A) 0
Asynchronous mode
(Initial value)
1
Synchronous mode
6
Character length (CHR)
0
8-bit data
(Initial value)
1
7-bit data
5
Parity enable (PE)
0
Parity bit addition and check disabled
(Initial value)
1
Parity bit addition and check enabled
4
Parity mode (O/E)
0
Even parity
(Initial value)
1
Odd parity
3
Stop bit length (STOP)
0
1 stop bit
(Initial value)
1
2 stop bits
2
Multiprocessor bit (MP)
0
Multiprocessor function disabled (Initial value)
1
Multiprocessor format selected
1, 0
Clock select 1, 0
(CKS1, CKS0)
0 0 φ clock
1 φ/4 clock
(Initial value)
1 0 φ/16 clock
1 φ/64 clock
Rev. 5.00 Jan 06, 2006 page 693 of 818
REJ09B0273-0500