HD64F7051SFJ20V Datasheet, PDF (684/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 22 Electrical Characteristics
22.3.3 Bus Timing
Table 22.6 Bus Timing
Conditions: V_CC = 5.0 V ± 10%, AV_CC = 5.0 V ±10%, AV_REF = 4.5 V – AV_CC, V_SS = AV_SS = 0 V,
Ta = –40 to +85°C
Item
Symbol Min
Address delay time
t
—
AD
CS delay time 1
t_CSD1
—
CS delay time 2
t_CSD2
—
Read strobe delay time 1
t_RSD1
—
Read strobe delay time 2
t
—
RSD2
Read data setup time
t_RDS
28
Read data hold time
t_RDH
0
Write address setup time
t_AS
0
Write address hold time
t_WR
5
Write strobe delay time 1
t
—
WSD1
Write strobe delay time 2
t
—
WSD2
Write data delay time
t_WDD
—
Write data hold time
t_WDH
t_cyc × m
WAIT setup time
t_WTS
15
WAIT hold time
t_WTH
0
Read data access time
t_ACC
t_cyc × (n + 2) – 45
Access time from read strobe t_OE
t_cyc × (n + 1.5) – 45
DACK delay time
t_DACKD1
—
Note: n is the number of waits.
m=1: CS assort extended cycle
m=0: Normal cycle (CS assort non-extended cycle)
Max
25
25
25
25
25
—
—
—
—
25
25
35
—
—
—
—
—
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure
22.8, 22.9
22.10
22.8, 22.9
Rev. 5.00 Jan 06, 2006 page 662 of 818
REJ09B0273-0500