HD64F7051SFJ20V Datasheet, PDF (285/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 10 Advanced Timer Unit (ATU)
Bit 6—One-Shot Pulse Interrupt Enable (OSE10G): Enables or disables interrupt requests by
OSF10G in TSR when OSF10G is set to 1.
Bit 6:
OSE10G
0
1
Description
OSI10G interrupt requested by OSF10G is disabled
OSI10G interrupt requested by OSF10G is enabled
(Initial value)
Bit 5—One-Shot Pulse Interrupt Enable (OSE10F): Enables or disables interrupt requests by
OSF10F in TSR when OSF10F is set to 1.
Bit 5:
OSE10F
0
1
Description
OSI10F interrupt requested by OSF10F is disabled
OSI10F interrupt requested by OSF10F is enabled
(Initial value)
Bit 4—One-Shot Pulse Interrupt Enable (OSE10E): Enables or disables interrupt requests by
OSF10E in TSR when OSF10E is set to 1.
Bit 4:
OSE10E
0
1
Description
OSI10E interrupt requested by OSF10E is disabled
OSI10E interrupt requested by OSF10E is enabled
(Initial value)
Bit 3—One-Shot Pulse Interrupt Enable (OSE10D): Enables or disables interrupt requests by
OSF10D in TSR when OSF10D is set to 1.
Bit 3:
OSE10D
0
1
Description
OSI10D interrupt requested by OSF10D is disabled
OSI10D interrupt requested by OSF10D is enabled
(Initial value)
Rev. 5.00 Jan 06, 2006 page 263 of 818
REJ09B0273-0500