HD64F7051SFJ20V Datasheet, PDF (829/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Bit
Bit Name
Value
1
Transfer end (TE)
0
1
0
DMAC enable (DE)
0
1
Appendix A On-Chip Supporting Module Registers
Description
Number of transfers specified in DMATCR not completed(Initial value)
[Clearing conditions]
Read TE when TE =1, then write 0 in TE
Power-on reset or transition to standby mode
Number of transfers specified in DMATCR completed
Operation on corresponding channel disabled
(Initial value)
Operation on corresponding channel enabled
Rev. 5.00 Jan 06, 2006 page 807 of 818
REJ09B0273-0500