HD64F7051SFJ20V Datasheet, PDF (522/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 16 Pin Function Controller (PFC)
16.3.9 Port E IO Register (PEIOR)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
—
PE14 PE13 PE12 PE11 PE10 PE9
IOR IOR IOR IOR IOR IOR
PE8
IOR
PE7
IOR
PE6
IOR
PE5
IOR
PE4
IOR
PE3
IOR
PE2
IOR
PE1
IOR
PE0
IOR
Initial value: 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
The port E IO register (PEIOR) is a 16-bit readable/writable register that selects the input/output
direction of the 15 pins in port E. Bits PE14IOR to PE0IOR correspond to pins PE14/TIOC3 to
PE0/TIOA1. PEIOR is enabled when port E pins function as general input/output pins (PE14 to
PE0) or as ATU input/output pins, and disabled otherwise. PEIOR bits 8 to 11 should be cleared to
0 when ATU input capture input is selected.
When port E pins function as PE14 to PE0, a pin becomes an output when the corresponding bit in
PEIOR is set to 1, and an input when the bit is cleared to 0.
PEIOR is initialized to H'8000 by a power-on reset (excluding a WDT power-on reset), and in
hardware standby mode. It is not initialized in software standby mode or sleep mode.
16.3.10 Port E Control Register (PECR)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
—
PE14 PE13 PE12 PE11 PE10 PE9
MD MD MD MD MD MD
PE8
MD
PE7
MD
PE6
MD
PE5
MD
PE4
MD
PE3
MD
PE2
MD
PE1
MD
PE0
MD
Initial value: 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W: R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
The port E control register (PECR) is a 16-bit readable/writable register that selects the functions
of the 15 multiplex pins in port E.
PECR is initialized to H'8000 by a power-on reset (excluding a WDT power-on reset), and in
hardware standby mode. It is not initialized in software standby mode or sleep mode.
Bit 15—Reserved: This bit is always read as 1, and should only be written with 1.
Rev. 5.00 Jan 06, 2006 page 500 of 818
REJ09B0273-0500