HD64F7051SFJ20V Datasheet, PDF (804/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Appendix A On-Chip Supporting Module Registers
Flash Memory Control Register 1
H'FFFF8580
8
(FLMCR1)
Bit: 7
6
5
4
3
2
Bit name: FWE SWE ESU PSU
EV
PV
Initial value: 1/0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W
Flash Memory
1
0
E
P
0
0
R/W R/W
Bit
Bit Name
Value Description
7
Flash write enable
(FWE)
0
Low-level input at FWE pin (hardware protect
state)
1
High-level input at FWE pin
6
Software write enable
0
Writes disabled
(SWE)
1
Writes enabled
(Initial value)
[Setting condition]
FWE = 1
5
Erase setup (ESU)
0
Erase setup released
(Initial value)
1
Erase setup
4
Program setup (PSU)
0
Program setup released
(Initial value)
1
Program setup
3
Erase-verify (EV)
0
Exit from erase-verify mode
(Initial value)
1
Transition to erase-verify mode
2
Program-verify (PV)
0
Exit from program-verify mode
(Initial value)
1
Transition to program-verify mode
1
Erase (E)
0
Exit from erase mode
(Initial value)
1
Transition to erase mode
0
Program (P)
0
Exit from program mode
(Initial value)
1
Transition to program mode
Rev. 5.00 Jan 06, 2006 page 782 of 818
REJ09B0273-0500