HD64F7051SFJ20V Datasheet, PDF (809/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Appendix A On-Chip Supporting Module Registers
A/D Control/Status Register 1
(ADCSR1)
H'FFFF85F8
8/16
A/D
Bit: 7
6
5
4
3
2
1
0
Bit name: ADF ADIE ADST SCAN CKS
—
CH1 CH0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/(W)* R/W R/W R/W R/W
R
R/W R/W
Note: * Only 0 can be written to clear the flag.
Bit Bit Name
Value Description
7
A/D end flag (ADF)
0
A/D1 executing A/D conversion or in idle state (Initial value)
[Clearing conditions]
1. Read ADF when ADF =1, then write 0 in ADF
2. DMAC activated by ADI1 interrupt
1
A/D1 has ended A/D conversion and digital value has been
transferred to ADDR
[Setting conditions]
1. Single mode: A/D conversion ends
2. Scan mode: All A/D conversion ends within one selected
analog group
6
A/D interrupt enable
0
(ADIE)
1
ADI1 A/D interrupt is disabled
ADI1 A/D interrupt is enabled
(Initial value)
5
A/D start (ADST)
0
A/D conversion is stopped
(Initial value)
1
A/D conversion is in progress
[Clearing conditions]
1. Single mode: ADST is cleared automatically when A/D
conversion ends
2. Scan mode: Confirm that ADF in ADCSR1 is 1, then write 0
in ADST
4
Scan mode (SCAN)
0
Single mode
(Initial value)
1
Scan mode
3
Clock select (CKS)
0
Conversion time = 266 states (maximum)
(Initial value)
1
Conversion time = 134 states (maximum)
Analog Input Channels
Single Mode
Scan Mode
1, 0 Channel select 1 and 0 0 0 AN12 (Initial value)
(CH1, CH0)
1 AN13
AN12
AN12, 13
1 0 AN14
AN12–14
1 AN15
AN12–15
Rev. 5.00 Jan 06, 2006 page 787 of 818
REJ09B0273-0500