HD64F7051SFJ20V Datasheet, PDF (394/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

Section 13 Serial Communication Interface (SCI)
Table 13.2 Registers
Channel Name
Abbreviation R/W
Initial
Value Address^*2
Access
Size
0
Serial mode register
SMR0
R/W H'00 H'FFFF81A0 8, 16
Bit rate register
BRR0
R/W H'FF H'FFFF81A1 8, 16
Serial control register SCR0
R/W H'00 H'FFFF81A2 8, 16
Transmit data register
Serial status register
TDR0
SSR0
R/W H'FF
R/(W) ^*1 H'84
H'FFFF81A3 8, 16
H'FFFF81A4 8, 16
Receive data register RDR0
R
H'00 H'FFFF81A5 8, 16
1
Serial mode register
SMR1
R/W H'00 H'FFFF81B0 8, 16
Bit rate register
BRR1
R/W H'FF H'FFFF81B1 8, 16
Serial control register SCR1
R/W H'00 H'FFFF81B2 8, 16
Transmit data register
Serial status register
TDR1
SSR1
R/W H'FF
R/(W) ^*1 H'84
H'FFFF81B3 8, 16
H'FFFF81B4 8, 16
Receive data register RDR1
R
H'00 H'FFFF81B5 8, 16
2
Serial mode register
SMR2
R/W H'00 H'FFFF81C0 8, 16
Bit rate register
BRR2
R/W H'FF H'FFFF81C1 8, 16
Serial control register SCR2
R/W H'00 H'FFFF81C2 8, 16
Transmit data register
Serial status register
TDR2
SSR2
R/W H'FF
R/(W) ^*1 H'84
H'FFFF81C3 8, 16
H'FFFF81C4 8, 16
Receive data register RDR2
R
H'00 H'FFFF81C5 8, 16
Notes: In register access, two cycles are required for byte access, and four cycles for word
access.
1. The only value that can be written is a 0 to clear the flags.
2. Do not access empty addresses.
Rev. 5.00 Jan 06, 2006 page 372 of 818
REJ09B0273-0500