HD64F7051SFJ20V Datasheet, PDF (371/843 Pages) Renesas Technology Corp – Hardware Manual Renesas 32-Bit RISC

11.3 Operation
Section 11 Advanced Pulse Controller (APC)
11.3.1 Overview
APC pulse output is enabled by designating multiplex pins for APC pulse output with the pin
function controller (PFC), and setting the corresponding bits to 1 in the pulse output port control
register (POPCR).
When general register 2A (GR2A) in the advanced timer unit (ATU) subsequently generates a
compare-match signal, 1 is output from the pins set to 1 by bits 7 to 0 in POPCR. When general
register 2B (GR2B) generates a compare-match signal, 0 is output from the pins set to 1 by bits 15
to 8 in POPCR.
0 is output from the output-enabled state until the first compare-match occurs.
The advanced pulse controller output operation is shown in figure 11.2.
CR
Upper 8 bits
of POPCR
Compare-match
signal
GR2B
APC output pins
(PULS0 to PULS7)
Port function
selection
Reset signal
Set signal
Compare-match
signal
GR2A
Lower 8 bits
of POPCR
Figure 11.2 Advanced Pulse Controller Output Operation
Rev. 5.00 Jan 06, 2006 page 349 of 818
REJ09B0273-0500