SH7618 Datasheet, PDF (628/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Appendix
IO: Input/output
H: High level output
L:
Low level output
Z:
High-impedance
P:
Input or output depending on the register setting
Notes: 1. Depends on the clock mode (setting of pins MD2 to MD0).
2. Depends on the HIZCNT bit in CMNCR.
3. High-impedance when HIFEBL = low
4. Depends on the HIZMEM bit in CMNCR.
5. Depends on the HIZCNT bit in CMNCR or the CKOEN bit in FRQCR.
6. This pin becomes output state only when reading data from the H-UDI and retains high-
impedance state when the pin is not output state.
Rev. 6.00 Jun. 12, 2007 Page 596 of 610
REJ09B0131-0600