SH7618 Datasheet, PDF (318/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 12 Ethernet Controller Direct Memory Access Controller (E-DMAC)
(b) Transmit Descriptor 1 (TD1)
TD1 specifies the transmit buffer length (maximum 64 kbytes).
Initial
Bit
Bit Name value R/W Description
31 to 16 TDL
All 0
R/W Transmit Buffer Data Length
These bits specify the valid transfer byte length in the
corresponding transmit buffer.
When the one frame/multi-buffer system is specified
(TD0 and TFP = 10 or 00), the transfer byte length
specified in the descriptors at the start and midway
can be set in byte units.
15 to 0 
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
(c) Transmit Descriptor 2 (TD2)
TD2 specifies the 32-bit transmit buffer start address. The transmit buffer start address setting can
be aligned with a byte, a word, or a longword boundary.
Rev. 6.00 Jun. 12, 2007 Page 286 of 610
REJ09B0131-0600