SH7618 Datasheet, PDF (599/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 21 Electrical Characteristics
CKIO
A25 to A0
A11^*
Td1
Td2
Td3
Td4
Tr
Tc1
Tc2
Tc3
Tc4
t_AD1
t_AD1
t_AD1
t_AD1
t_AD1
Row
address
Column
address
Column Column
address address
Column
address
t_AD1
t_AD1
Read command
Tde
t_AD1
t_AD1
CSn
RD/WR
RAS
CAS
DQMxx
t_CSD1
t_RWD
t_RASD
t_RASD
t_CASD
t_DQMD
D15 to D0
t
BSD
BS
t_CSD1
t_RWD
t_CASD
t_DQMD
t_RDS2
t_RDH2
t
BSD
t_RDS2
t_RDH2
CKE
(High)
Note: * An address pin connected to pin A10 of SDRAM
Figure 21.24 Synchronous DRAM Burst Read Bus Cycle (Single Read × 4)
(Bank Active Mode: ACT + READ Commands, CAS Latency = 2, WTRCD = 0 Cycle)
Rev. 6.00 Jun. 12, 2007 Page 567 of 610
REJ09B0131-0600