SH7618 Datasheet, PDF (42/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 1 Overview
Classifi-
cation Abbr.
I/O Pin Name Description
Bus
control
CE1B
CE2A
CE2B
ICIOWR
Output PCMCIA Card Chip enable for PCMCIA allocated to area 6
Select Lower
Side
Output PCMCIA Card Chip enable for PCMCIA allocated to area 5
Select Upper
Side
Output PCMCIA Card Chip enable for PCMCIA allocated to area 6
Select Upper
Side
Output PCMCIA I/O Connects to the PCMCIA I/O write strobe pin.
Write Strobe
ICIORD
Output PCMCIA I/O Connects to the PCMCIA I/O read strobe pin.
Read Strobe
WE
Output PCMCIA
Connects to the PCMCIA memory write strobe.
Memory Write
Strobe
IOIS16
Input
PCMCIA
Dynamic Bus
Sizing
In little endian mode, this signal indicates 16-bit bus width of
PCMCIA. In big endian mode, fix this pin low.
Ethernet CRS
controller _COL
Input Carrier Sense Carrier sense pin
Input Collision
Collision detect pin
MII_TXD3 to Output Transmit Data 4-bit transmit data pins
MII_TXD0
TX_EN
Output Transmit
Enable
Indicates that transmit data is on pins MII_TXD3 to
MII_TXD0.
TX_CLK
Input Transmit
Clock
Timing reference input for the TX_EN, TX_ER, and
MII_TXD3 to MII_TXD0 pins
TX_ER
Output Transmit Error Informs PHY LSI of an error during transmission.
MII_RXD3 to Input Receive Data 4-bit receive data pins
MII_RXD0
RX_DV
Input Receive Data Indicates that valid receive data is on pins MII_RXD3 to
Valid
MII_RXD0.
RX_CLK
Input Receive Clock Timing reference input for the RX_DV, RX_ER, and
MII_RXD3 to MII_RXD0 pins
RX_ER
Input Receive Error Pin for detection of an error during reception
Rev. 6.00 Jun. 12, 2007 Page 10 of 610
REJ09B0131-0600