SH7618 Datasheet, PDF (326/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 12 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Reception flowchart
This LSI + memory
E-DMAC
Receive FIFO
EtherC
PHY
EtherC/E-DMAC
initialization
Descriptor and
receive
buffer setting
Start of reception
Descriptor read
Frame reception
Receive data transfer
Descriptor write-back
Descriptor read
Receive data transfer
Descriptor write-back
Descriptor read (receive
ready for the next frame)
Reception
completed
Figure 12.5 Sample Reception Flowchart
Rev. 6.00 Jun. 12, 2007 Page 294 of 610
REJ09B0131-0600