SH7618 Datasheet, PDF (16/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

12.4.2 Usage Notes on SH-Ether Transmit-FIFO Underflow.......................................... 306
Section 13 Compare Match Timer (CMT) .......................................................... 315
13.1 Features.............................................................................................................................. 315
13.2 Register Descriptions......................................................................................................... 316
13.2.1 Compare Match Timer Start Register (CMSTR) .................................................. 316
13.2.2 Compare Match Timer Control/Status Register (CMCSR) .................................. 317
13.2.3 Compare Match Counter (CMCNT)..................................................................... 318
13.2.4 Compare Match Constant Register (CMCOR) ..................................................... 318
13.3 Operation ........................................................................................................................... 319
13.3.1 Interval Count Operation ...................................................................................... 319
13.3.2 CMCNT Count Timing......................................................................................... 319
13.4 Interrupts............................................................................................................................ 320
13.4.1 Interrupt Sources................................................................................................... 320
13.4.2 Timing of Setting Compare Match Flag ............................................................... 320
13.4.3 Timing of Clearing Compare Match Flag............................................................. 320
13.5 Usage Notes ....................................................................................................................... 321
13.5.1 Conflict between Write and Compare-Match Processes of CMCNT ................... 321
13.5.2 Conflict between Word-Write and Count-Up Processes of CMCNT ................... 322
13.5.3 Conflict between Byte-Write and Count-Up Processes of CMCNT..................... 323
13.5.4 Conflict between Write Processes to CMCNT with the Counting Stopped and
CMCOR................................................................................................................ 323
Section 14 Serial Communication Interface with FIFO (SCIF).......................... 325
14.1 Overview............................................................................................................................ 325
14.1.1 Features................................................................................................................. 325
14.2 Pin Configuration............................................................................................................... 328
14.3 Register Description .......................................................................................................... 329
14.3.1 Receive Shift Register (SCRSR) .......................................................................... 330
14.3.2 Receive FIFO Data Register (SCFRDR) .............................................................. 330
14.3.3 Transmit Shift Register (SCTSR) ......................................................................... 330
14.3.4 Transmit FIFO Data Register (SCFTDR)............................................................. 331
14.3.5 Serial Mode Register (SCSMR)............................................................................ 331
14.3.6 Serial Control Register (SCSCR).......................................................................... 334
14.3.7 Serial Status Register (SCFSR) ............................................................................ 338
14.3.8 Bit Rate Register (SCBRR) .................................................................................. 346
14.3.9 FIFO Control Register (SCFCR) .......................................................................... 353
14.3.10 FIFO Data Count Register (SCFDR).................................................................... 356
14.3.11 Serial Port Register (SCSPTR) ............................................................................. 357
14.3.12 Line Status Register (SCLSR) .............................................................................. 361
Rev. 6.00 Jun. 12, 2007 Page xvi of xxxii