SH7618 Datasheet, PDF (542/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 20 List of Registers
20.1 Register Addresses (Address Order)
Entries under Access size indicates numbers of bits.
The number of access cycles indicate the number of cycles of the given reference clock. B, W, and
L indicate values for 8-, 16-, and 32-bit accesses, respectively.
Note: Access to undefined or reserved addresses is prohibited. Since operation or continued
operation is not guaranteed when these registers are accessed, do not attempt such access.
Register Name
Cache Control Register 3
Port A data register H
Port A IO register H
Port A control register H1
Port A control register H2
Port B data register L
Port B IO register L
Port B control register L1
Port B control register L2
Port C data register H
Port C data register L
Port C IO register H
Port C IO register L
Port C control register H2
Port C control register L1
Port C control register L2
Port D data register L
Port D IO register L
Port D control register L2
Port E data register H
Port E data register L
Port E IO register H
Port E IO register L
Port E control register H1
Abbreviation No. of Bits Address
Module
CCR3*²
32
H'F80000B4 Cache
PADRH
16
H'F8050000 I/O
PAIORH
16
H'F8050004 I/O
PACRH1
16
H'F8050008 I/O
PACRH2
16
H'F805000A I/O
PBDRL
16
H'F8050012 I/O
PBIORL
16
H'F8050016 I/O
PBCRL1
16
H'F805001C I/O
PBCRL2
16
H'F805001E I/O
PCDRH
16
H'F8050020 I/O
PCDRL
16
H'F8050022 I/O
PCIORH
16
H'F8050024 I/O
PCIORL
16
H'F8050026 I/O
PCCRH2
16
H'F805002A I/O
PCCRL1
16
H'F805002C I/O
PCCRL2
16
H'F805002E I/O
PDDRL
16
H'F8050032 I/O
PDIORL
16
H'F8050036 I/O
PDCRL2
16
H'F805003E I/O
PEDRH
16
H'F8050040 I/O
PEDRL
16
H'F8050042 I/O
PEIORH
16
H'F8050044 I/O
PEIORL
16
H'F8050046 I/O
PECRH1
16
H'F8050048 I/O
Access Size
32
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
8/16
Rev. 6.00 Jun. 12, 2007 Page 510 of 610
REJ09B0131-0600