SH7618 Datasheet, PDF (406/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 14 Serial Communication Interface with FIFO (SCIF)
Figure 14.9 shows an example of the operation for reception.
Start
1 bit
Data
Parity Stop Start
bit bit bit
Data
Parity Stop
bit bit
Serial
data
0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1 0
0/1
RDF
FER
One frame
RXI interrupt
request
Data read and RDF flag
read as 1 then cleared to
0 by RXI interrupt handler
ERI interrupt request
generated by receive
error
Figure 14.9 Example of SCIF Receive Operation
(8-Bit Data, Parity, One Stop Bit)
5. When modem control is enabled, the RTS signal is output depending on the empty status of
SCFRDR. When RTS is 0, reception is possible. When RTS is 1, this indicates that the
SCFRDR is full and no extra data can be received. (Only for channel 0 and channel 1)
Figure 14.10 shows an example of the operation when modem control is used.
Serial data
RxD
Start
bit
0 D0 D1 D2
Parity Stop
bit bit
D7 0/1 1
Start
bit
0 D0 D1
D7 0/1
RTS
Figure 14.10 Example of Operation Using Modem Control (RTS)
Rev. 6.00 Jun. 12, 2007 Page 374 of 610
REJ09B0131-0600