SH7618 Datasheet, PDF (418/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 14 Serial Communication Interface with FIFO (SCIF)
SCK2
Reset
R
QD
SCKIO
C
Bit 3
SPTRW
Reset
R
QD
SCKDT
C
Bit 2
SPTRW
Internal data bus
Clock output enable signal*
Sirial clock output signal*
Serial clock input signal*
Serial input enable signal*
SPTRW:
SPTRR:
SCSPTR write
SCSPTR read
SPTRR
Note: * These signals control the SCK pin according to the settings of the C/A bit in SCSMR
and bits CKE1 and CKE0 in SCSCR.
Figure 14.21 SCKIO Bit, SCKDT bit, and SCK Pin
Reset
R
QD
SPBIO
C
Bit 1
SPTRW
Internal data bus
Reset
TxD
R
Bit 0
QD
SPBDT
C
SPTRW
Transmit enable signal
Serial transmit data
SPTRW: SCSPTR write
Figure 14.22 SPBIO Bit, SPBDT bit, and TxD Pin
Rev. 6.00 Jun. 12, 2007 Page 386 of 610
REJ09B0131-0600