SH7618 Datasheet, PDF (44/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 1 Overview
Classifi-
cation Abbr.
I/O Pin Name Description
User
TCK
debugging _TMS
interface
(H-UDI)
TDI
Input Test Clock
Input Test Mode
Select
Input Test Data
Input
Test clock input pin
Input pin for test mode select signal
Serial input pin for an instruction and data
TDO
TRST
Output Test Data
Output
Input Test Reset
Serial output pin for an instruction and data
Input pin for initialization
I/O port
PA25 to
PA16
Input/ General port Pins for 10-bit general input/output port
output
PB13 to
PB00
Input/ General port Pins for 14-bit general input/output port
output
PC20 to
PC00
Input/ General port Pins for 21-bit general input/output port
output
PD07 to
PD00
Input/ General port Pins for 8-bit general input/output port
output
Emulator
interface
PE24 to
PE00
ASEMD
Input/ General port
output
Input ASE Mode
Pins for 25-bit general input/output port
Specifies ASE mode.
This LSI enters ASE mode when this signal goes low and
normal mode when this pin goes high. In ASE mode,
functions for the emulator are available.
Test Mode TESTMD Input Test Mode Specifies test mode.
Note:
This LSI enters test mode when this signal goes low. Fix this
signal high.
TESTOUT Output Test Output Output pin for testing. This pin should be open.
* Magic Packet^TM is the trademark of Advanced Micro Devices, Inc.
Rev. 6.00 Jun. 12, 2007 Page 12 of 610
REJ09B0131-0600