SH7618 Datasheet, PDF (500/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 17 I/O Ports
• PEDRL
Initial
Bit Bit Name Value R/W Description
15 PE15DR 0
R/W See table 17.5.
14 PE14DR 0
R/W
13 PE13DR 0
R/W
12 PE12DR 0
R/W
11 PE11DR 0
R/W
10 PE10DR 0
R/W
9
PE9DR 0
R/W
8
PE8DR 0
R/W
7
PE7DR 0
R/W
6
PE6DR 0
R/W
5
PE5DR 0
R/W
4
PE4DR 0
R/W
3
PE3DR 0
R/W
2
PE2DR 0
R/W
1
PE1DR 0
R/W
0
PE0DR 0
R/W
Table 17.5 Port E Data Registers H, L (PEDRH, PEDRL) Read/Write Operation
• Bits 8 to 0 in PEDRH and Bits 15 to 0 in PEDRL
Pin Function
General input
PBIORL
0
Read
Pin state
General output 1
Other functions *
PEDRH or
PEDRL value
PEDRH or
PEDRL value
Write
Data can be written to PEDRH or PEDRL but no
effect on the pin state.
Written value is output from the pin.
Data can be written to PEDRH or PEDRL but no
effect on the pin state.
Rev. 6.00 Jun. 12, 2007 Page 468 of 610
REJ09B0131-0600