SH7618 Datasheet, PDF (273/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 11 Ethernet Controller (EtherC)
11.3.8 PHY Status Register (PSR)
PSR is a read-only register that can read interface signals from the PHY.
Bit
Bit Name
31 to 1 
0
LMON
Initial
Value
All 0
0
R/W Description
R
Reserved
These bits are always read as 0. The write value
should always be 0.
R
LNKSTA Pin Status
The Link status can be read by connecting the Link
signal output from the PHY to the LNKSTA pin. For
the polarity, refer to the PHY specifications to be
connected.
11.3.9 Transmit Retry Over Counter Register (TROCR)
TROCR is a 32-bit counter that indicates the number of frames that were unable to be transmitted
in 16 transmission attempts including the retransfer. When 16 transmission attempts have failed,
TROCR is incremented by 1. When the value in this register reaches H'FFFFFFFF, the count is
halted. The counter value is cleared to 0 by a write to this register with any value.
Bit
Bit Name
31 to 0 TROC31 to
TROC0
Initial
Value
All 0
R/W Description
R/W Transmit Retry Over Count
These bits indicate the number of frames that were
unable to be transmitted in 16 transmission attempts
including the retransfer.
Rev. 6.00 Jun. 12, 2007 Page 241 of 610
REJ09B0131-0600