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SH7618 Datasheet, PDF (593/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
Section 21 Electrical Characteristics
CKIO
A25 to A0
A11*
CSn
RD/WR
RAS
CAS
DQMxx
D15 to D0
BS
Td1
Td2
Td3
Td4
Tr
Tc1
Tc2
Tc3
Tc4
Tde
tAD1
tAD1
tAD1
tAD1
tAD1
Row
address
Column
address
Column Column
address address
Column
address
tAD1
tAD1
Read command
tAD1
tAD1
Read A command
tCSD1
tAD1
tCSD1
tRWD
tRASD
tRASD
tCASD
tDQMD
tRWD
tCASD
tDQMD
tBSD
tRDS2
tRDH2
tBSD
tRDS2
tRDH2
CKE
(High)
Note: * An address pin connected to pin A10 of SDRAM
Figure 21.18 Synchronous DRAM Burst Read Bus Cycle (Single Read × 4)
(Auto-Precharge, CAS Latency = 2, WTRCD = 0 Cycle, WTRP = 1 Cycle)
Rev. 6.00 Jun. 12, 2007 Page 561 of 610
REJ09B0131-0600