SH7618 Datasheet, PDF (104/646 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series

Section 5 Exception Handling
5.4 Interrupts
5.4.1 Interrupt Sources
Table 5.7 shows the sources that start the interrupt exception handling. They are NMI, user break,
H-UDI, IRQ and on-chip peripheral modules.
Table 5.7 Interrupt Sources
Type
NMI
User break
H-UDI
IRQ
On-chip peripheral module
Request Source
NMI pin (external input)
User break controller (UBC)
User debug interface (H-UDI)
IRQ0 to IRQ7 pins (external input)
Watchdog timer (WDT)
Ether controller (EtherC and E-DMAC)
Compare match timer (CMT0 and CMT1)
FIFO on-chip serial communication interface
(SCIF0, SCIF1, and SCIF2)
Host interface (HIF)
Number of
Sources
1
1
1
8
1
1
2
12
2
All interrupt sources are given different vector numbers and vector table address offsets. For
details on vector numbers and vector table address offsets, see table 6.2, Interrupt Exception
Handling Vectors and Priorities in section 6, Interrupt Controller (INTC).
Rev. 6.00 Jun. 12, 2007 Page 72 of 610
REJ09B0131-0600